The present invention relates: to a semiconductor device, and in particular to a technology effectively applicable to a semiconductor device including a silicon carbide substrate, and a manufacturing method thereof.
A semiconductor power device is required to have a low on resistance and a low switching loss in addition to a high withstanding voltage but the performance of a silicon (Si) power device that currently is the mainstream is coming close to its theoretical limits. Silicon carbide (SiC) has a breakdown field strength about one digit larger than Si and hence the resistance of a device can be reduced theoretically by not less than three digits by reducing the thickness of a drift layer to retain withstanding voltage to about one tenth and increasing an impurity concentration by about a hundred times. Further, SiC has a band gap about three times larger than Si and hence can withstand high temperature operation and an SiC semiconductor device is expected to have performance exceeding an Si semiconductor device.
With attention focused on the advantages of SiC, the research and development of a DMOS (Double-Diffused MOSFET) as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) of a high withstanding voltage has been advanced.
An example of a manufacturing method of a DMOS is described in Patent Literature 1 (Japanese Unexamined Patent Application Publication No. 2008-227172). It describes that a stepped section that is an insulating film having a film thickness larger than a gate insulating film is formed beside the gate insulating film by a thermal oxidization method by making use of the accelerated oxidation characteristic of an amorphous layer as a substrate.